Silicon planar technology for single-photon optical detectors

In this paper we report the results relative to the design and fabrication of Single Photon Avalanche Detectors (SPAD) operating at low voltage in planar technology. These silicon sensors consist of pn junctions that are able to remain quiescent above the breakdown voltage until a photon is absorbed in the depletion volume. This event is detected through an avalanche current pulse. Device design and critical issues in the technology are discussed. Experimental test procedures are then described for dark-counting rate, afterpulsing probability, photon timing resolution, quantum detection efficiency. Through these experimental setups we have measured the electrical and optical performances of different SPAD technology generations. The results from these measurements indicate that in order to obtain low-noise detectors it is necessary to introduce a local gettering process and to realize the diode cathode through in situ doped polysilicon deposition. With such technology low noise detectors with dark counting rates at room temperature down to 10c/s for devices with 10μm diameter, down to 1kc/s for 50μm diameter have been obtained. Noticeable results have been obtained also as far as time jitter and quantum detection efficiency are concerned. This technology is suitable for monolithic integration of SPAD detectors and associated circuits. Small arrays have already been designed and fabricated. Preliminary results indicate that good dark count rate uniformity over the different array pixels has already been obtained.