標題: Challenges and Opportunities toward Online Training Acceleration using RRAM-based Hardware Neural Network
作者: Chang, Chih-Cheng
Liu, Jen-Chieh
Shen, Yu-Lin
Chou, Teyuh
Chen, Pin-Chun
Wang, I-Ting
Su, Chih-Chun
Wu, Ming-Hong
Hudec, Boris
Chang, Che-Chia
Tsai, Chia-Ming
Chang, Tian-Sheuan
Wong, H-S Philip
Hou, Tuo-Hung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-2017
摘要: This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nonlinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.
URI: http://hdl.handle.net/11536/146907
ISSN: 2380-9248
期刊: 2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
顯示於類別:會議論文