EFFICIENT BIT-LEVEL SYSTOLIC ARRAY FOR THE LINEAR DISCRIMINANT FUNCTION CLASSIFIER

標題:	EFFICIENT BIT-LEVEL SYSTOLIC ARRAY FOR THE LINEAR DISCRIMINANT FUNCTION CLASSIFIER
作者:	WANG, CL WEI, CH CHEN, SH 傳播研究所電控工程研究所 Institute of Communication Studies Institute of Electrical and Control Engineering
公開日期:	1-十月-1987
URI:	http://hdl.handle.net/11536/4606
ISSN:	0956-3768
期刊:	IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS
Volume:	134
Issue:	5
起始頁:	216
結束頁:	224
顯示於類別：	期刊論文