新型紅外線偵測器陣列之低溫互補式金氧半電流讀出積體電路設計與分析及其在熱影像系統之應用

Abstract

本論文提出並分析新型低溫(Cryogenic)互補式金氧半(CMOS)電流讀出電 路設計技巧以製作運用在紅外線偵測器陣列光訊號讀出之積體電路晶片。 讀出電路為紅外線影像系統中偵測器陣列與後級訊號處理間的的重要介面 電路。為運用矽半導體元件電路之優良特性與匹配紅外線偵測器材質之低 溫工作環境，我們提出了可工作在低溫環境下之新型電流讀出電路架構， 並以互補式金氧半製程技術完成電路的設計、模擬、與晶方研製。而所製 作之新型讀出晶片中的優異效能與成果均已由實驗或模擬驗證。而這些新 型電路技巧在影像讀出上的應用亦以探討。首先，根據傳統之『直接注入 式』(Direct Injection)與『緩衝直接注入式』(Buffered Direct Injection)讀出電路，吾人提出一稱之為『共緩衝器直接注入式』( Shared Buffer Direct Injection) 的新型互補式金氧半紅外線偵測器之 偏壓與輸入級。此新型讀出電路運用了共半電路(shared half circuit) 的技巧於差動對(differential pair)緩衝器中，成功的改良了DI與BDI讀 出電路的缺點，節省一半的單元電路面積與功率消耗，並且提供了一高偏 壓穩定性、低雜訊、製程偏移控制、高注入效率(injection efficiency) 和高讀出品質的介面電路。此外一新型的動態放電輸出級(dynamic discharge outputstage)也被提出，此電路運用動態開關克服了紅外線偵 測器讀出晶片輸出級中的速度瓶頸，並只消耗了動態功率(dynamic power dissipation)，完成一低功率消耗、高讀出效能的讀出電路。配合此新型 偏壓輸入級(SBDI)和高速度、低功率之輸出級，一實驗性讀出晶片已設計 並完成晶方研製，經在液態氮溫度下(77oK)進行晶片量測，證實達到預期 結果。此新型讀出晶片之低功率與小單元面積特性適合運用於高解析度的 二維紅外線光壓陣列(Focal Plane Array)讀出。其次，根據所提出之 SBDI偏壓技巧與輸入級，本論文提出了『切換電流積分式』(Switch Current Integration)的新型讀出電路架構。因應紅外線光壓陣列越來越 大的解析度如64x64或128x128的發展，影像點距的縮小代表單元電路面積 的受限，傳統的積分電容在單元電路中所耗費的面積太大而限制了電路的 設計與應用。所提出的新型讀出架構SCI運用SBDI的偵測器偏壓技巧，使 用切換電流與積分的方式，成功的將單元積分電容移出偵測器陣列面積範 圍並共享。解決了單元面積受限問題、維持SBDI高效能介面、並提高了電 荷容量(charge capacity)與動態範圍(dynamic range)，完成一高性能的 讀出架構於50x50mm2的單元面積中。經過0.8mm DPDM N-Well互補式金氧 半技術的製造與低溫量測後證實，完成的64x64 SCI讀出晶片最大電荷容 量可達到1.12x108個電子、最大的阻抗增益(transimpedance)為1x109、 輸出線性度為99%、功率消耗為30mW。此讀出晶片可適用於更高解析度與 更小單元面積的設計與應用。此外，根據提出之SCI讀出架構，一新型互 補式金氧半讀出電路技術稱為『緩衝式閘調變數入』(Buffered Gate Modulation input)亦在本論文中完成設計與製作。此新型讀出電路技術 改進了傳統『閘調變數入』(Gate Modulation Input)的問題與缺點，並 利用了SCI讀出架構的特性，完成了包括適應性增益控制(adaptive gain control)與電流式背景壓抑(current-mode background suppression)功 能的智慧型讀出晶片。此前級訊號處理功能(on-FPA signal processing) 可以提高讀出電路的效能並降低後級電路雜訊之影響。電流式背景壓抑更 可提高訊號動態範圍與避免積分電容飽和。實驗量測結果驗證完成的128 x128 BGMI讀出晶片最大電荷容量可以達到5x107個電子、在10nA的背景電 流下阻抗增益為2.5x109、輸出線性度為99%、功率消耗為40mW在5V的工作 電壓。單元電路面積為50x50mm2。電流式背景壓抑的均勻度可達到98%。 此讀出晶片可適用於大範圍背景亮度與高對比影像讀出的運用。最後，根 據本論文所提的新型讀出架構SCI與BGMI在影像讀出的應用與成果被詳細 討論與分析。包含根據SCI架構所應用設計含點素平均(pixel averaging) 功能之智慧型光壓陣列(smart-FPA)讀出架構也被提出。從影像應用的模 擬成果中可以發現，本論文所提之新型讀出架構可以改善影像讀出品質， 包括低亮度影像的對比增強、高對比影像資料的讀出、高背景亮度的影像 改善和遭雜訊惡化影像之修正等。運用本論文所提出之新型讀出架構更可 發展成智慧型光壓陣列功能，進一步進入新一代讀出電路發展之領域。我 們深信，吾人所提出之新型互補式金氧半讀出電路架構以及其設計技術已 為紅外線影像系統之讀出處理電路設計開創一個新領域。爾後，相關的研 究發展與實際應用於不同影像系統包括可見光與紅外線將持續進行。 In this thesis, new design techniques of cryogenic CMOS current readout structure are proposed, developed, and applied to the implementation of photon signal readout integrated circuit for infrared detector array. The silicon readout circuit is an important interface circuit of detector array and signal processing stage in the IR image system. To achieve a high performance readout and fit the cryogenic working characteristic of IR detector material, new cryogenic CMOS current readout structures have been developed and fabricated. The functions and superior readout performance of the proposed new CMOS readout structure have been verified by simulations and experimental measurement under 77oK environment. Applications of the proposed CMOS readout structure on image processing have also been explored. At first, based on the conventional direct injection (DI) and buffered direct injection (BDI) readout circuit, a new CMOS input biasing circuit for infrared detector called the shared buffer direct injection (SBDI) is designed and proposed. This new SBDI readout circuit can improve the performance in the DI and BDI circuit by applying a shared half circuit technique on the differential pair buffer. It consumes only half area and power dissipation in the unit cell circuit as compared to the BDI with good readout performance of high bias stability, low noise, good threshold control, and high injection efficiency. A dynamic discharge source follower (DDSF) output stage is also proposed and analyzed. It can improvethe speed performance of the conventional source-follower output buffer and consumes only dynamic power dissipation. The expected performance and functions have been verified by experimental measurement under 77oK environment. The low power dissipation and small pixel area of the proposed new SBDI readout circuit make it more suitable for infrared (IR) readout applications, especially for 2-D focal plane arrays (FPA) under strict power and area limitations. Secondly, based on the application of the proposed SBDI input biasing technique, a new CMOS switch current integration (SCI) readout structure is proposed and analyzed. The pixel pitch becomes smaller and the unit cell area is limited due to the development of large format IR FPA like 64x64 or 128x128. By applying the proposed share-buffered direct-injection (SBDI) biasing technique and shared off focal-plane-array (off-FPA) integration capacitor structure, high-performance readout interface circuit for the IR FPA is realized with a pixel size of 50x50 mm2.An experimental 64x64 SCI readout chip has been designed and fabricated in 0.8 mm double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip at 77oK with 4V and 8V supply voltages have successfully verified both the readout function and the performance improvement. The fabricated chip has a maximum charge capacity of 1.12x108 electrons, a maximum transimpedance of 1x109 ohms, and an active power dissipation of 30 mW. The proposed CMOS SCI structure can be applied to various cryogenic IR FPAs Moreover, based on the proposed SCI readout structure, a new CMOS readout technique called buffered gate modulation input (BGMI) circuit is also proposed in this thesis. By applying the SCI readout structure, this new BGMI circuit can improve the performance and problem of the conventional gate modulation input (GMI) with adaptive gain control and current-mode background suppression. The on-FPA signal processing capability of BGMI circuit at front stage can reduce the noise effect of downstream circuit and improve the readout performance. Moreover, the current-mode background suppression can increase the signal dynamic range and avoid integrating saturation on capacitor. An experimental 128x128 BGMI readout chip has been designed and fabricated in 0.8 mm double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip under 77oK and 5V supply voltage have successfully verified both readout function and performance improvement. The fabricated chip has the maximum charge capacity of 5x107 electrons, the transimpedance of 2.5x109 ohms at 10nA background current, and the active power dissipation of 40 mW. The uniformity of current-mode background suppression is 99%. It has been shown that a high-performance readout interface circuit for IR FPA with high injection efficiency, high charge sensitivity, high dynamic range, large storage capacity, and low noise is realized within the pixel size of 50x50 um2. These advantageous traits make the BGMI circuit suitable for the various applications with a wide range of background current. Finally, the performance and applications of the proposed SCI structure and BGMI technique on image process is demonstrated and analyzed in detail. The smart focal plane array with 4-pixels averaging function is also designed and implemented by applying the SCI structure. The image readout performance of the proposed new CMOS readout structure in this thesis is improved by the on-FPA signal processing capability including adaptive gain control and background suppression. The contrast enhancement of weak signal, the readout capability of high contrast image, the background suppression, and the noise smoothing of degraded image has been demonstrated and verified by simulations. It is shown that the second-generation readout circuit with on-FPA signal processing and smart-FPA concept is achieved by applying the new CMOS readout structures proposed in this thesis. It is believed that the proposed CMOS current readout circuit and the associated design methodology offer new design scope and future feasibility for new-generation readout ICs of infrared detector array. Further improvement on circuit performance and practical applications in various image system including visible and thermal image readout will be explored and developed in the future.