Design and Verification of PCI Bus System integrated into IAM2000S

Abstract

隨著製程及晶片設計技術的進步，設計一個內含百萬千萬電晶體的晶片已成了可行之事．而其中以系統晶片最為熱門也是未來的趨視，所以本計畫以設計一顆以ARM為中央處理器兼具發展其週邊之系統為目的，其中包括快取記憶體，記憶體系統，記憶體管理單元，及橫跨不同滙流排協定的橋接元件． 本論文重點即著重在設計一個介於系統滙流排及週邊滙流排之間的橋接元件，此橋接元件意在用於就不同滙流排協定之間的訊號轉換，由於所使用的週邊滙流排和原本撘配系統滙流排的並不一樣，所以必須去克服兩者之間的差異點．除此之外，本論文亦加入了簡易的驗證系統，去檢測運行於此兩者滙流排系統協定的資料流工作．

With advancement of process and technology of chip design , it is possible to design a chip which contains millions transistors．It is obviously that the system-on-a-chip is the future trend of this field ,therefore our project is to design a system which ARM-9 like processor including cache , memory system MMU and the bridge crossing the different bus system domain． And the major contribution of this thesis is to implement a bridge across two different bus system , one is AHB system bus and another is PCI peripheral bus．The main job of the bridge is to convert the different signal information of different bus system during each transaction．However it is hard to replace the original peripheral bus APB with the current used one PCI．Besides , the verification system to the transaction across different bus domain is also implemented．By this thesis , we can know that the performance of such architecture adapted to the SOC architecture during operation．