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Abstract (summary): This thesis proposes a new CMOS driver for Vertical Cavity Surface Emitting LASER (VCSEL) diode arrays. A VCSEL is a promising light source for optical communication. However, its threshold voltage (1.5V for a 850-nm VCSEL) exceeds the rated supply voltage of nanoscale CMOS technologies. This makes difficult designing a driver sourcing a modulated current to a VCSEL’s anode directly, an arrangement suitable for low-cost parallel optical links. To overcome this problem, a combination of analog circuit techniques is proposed including a novel pad shield driving technique. A prototype fabricated in a 65-nm CMOS technology achieved 26-Gb/s bit-rate and 1.80-pJ/b power efficiency with an optical modulation amplitude (OMA) of +1.8dBm and 3.1ps-rms jitter when driving a 850-nm 14Gb/s commercial VCSEL. This is the highest-speed anode-driving CMOS VCSEL driver reported to date. Also it has the best power efficiency and the smallest area (0.024mm2) amongst anode-driving drivers in any process technology.