Integrating algorithm-level design and system-level design through specification synthesis
Permanent URL:
http://hdl.handle.net/2047/d20128376
Schirner, Gunar (Committee member)
Leeser, M. (Miriam), 1958- (Committee member)
Kaeli, David R. (Committee member)
This thesis introduces a specification synthesis approach that joins two design methodologies, Algorithm-Level Design (ALD) and System-Level Design (SLD), to establish a new Algorithm-Architecture Co-design flow. We designed and implemented an algorithm-to-specification synthesizer: Algo2Spec, which out of an algorithm model captured in ALD, such as Simulink, synthesizes into an SLD languages (SLDL) specification (e.g. SpecC/SystemC) enabling SLD exploration. Expanding the rich sets of SLD facilities into higher abstraction levels in ALD forms a new joint co-design methodology. The new flow seamlessly spans from the Simulink environment down to heterogeneous implementations crossing multiple abstractions. Our tools empower designers to construct, simulate, validate, explore, and deploy models in rapid feedback cycles. Our results illustrated the opportunities and benefits of our approach on a set of real-world applications and showed a significantly shortened design time.
In addition, we explore new optimization opportunities emerged from the specification synthesis with respect to Design Space Exploration (DSE) and software synthesis. We have identified several DSE challenges, such as selecting a suitable model granularity to balance the model mapping flexibility, specification quality as well as synthesis constraints (i.e. computation/communication efficiency and scheduling). We design two heuristics to address these challenges to reduce the DSE complexity while increase the overall performance efficiency. Moreover, once model-to-platform mapping is known, Algo2Spec allows to generate specifications with maximized computation efficiency and reduced communication overhead.
As both ALD and SLD incorporate the principles of the component-based design, a certain degree of modeling flexibility, gained by using abstracted component compositions, appears in both domains. However, such beneficial flexibility becomes overhead once the model, passing high-level modeling and exploration periods, enters the back-end synthesis phase. In software synthesis, such flexibility comes at a cost of run-time call site resolution. We investigated into the impeded performance in current embedded software synthesis from SLDL specifications. Our results show that by eliminating unnecessary flexibility overhead such as dynamic dispatch, the SLDL-to-C compiler achieved better performance on embedded processors, improved readability, and debuggability compare to current solutions.
The outcome of the work greatly simplifies the Algorithm-Architecture Co-design with new tools, methodologies, and optimizations. The thesis has demonstrated how the new design flow and methods can deeply enhance current algorithm design solutions to leverage the vastly available computing power in today's heterogeneous architectures.
simulink
specC
specification synthesis
systemC
system-level optimizations
Computer Engineering
Computer Sciences
SIMULINK
Systems on a chip -- Design
Embedded computer systems -- Design
Multiprocessors -- Design
System design -- Computer simulation
SpecC (Computer program language)
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