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A case study for the real-time experimental evaluation of the VIPER microprocessorAn experiment to evaluate the applicability of the Verifiable Integrated Processor for Enhanced Reliability (VIPER) microprocessor to real time control is described. The VIPER microprocessor was invented by the Royal Signals and Radar Establishment (RSRE), U.K., and is an example of the use of formal mathematical methods for developing electronic digital systems with a high degree of assurance on the system design and implementation correctness. The experiment consisted of selecting a control law, writing the control law algorithm for the VIPER processor, and providing real time, dynamic inputs into the processor and monitoring the outputs. The control law selected and coded for the VIPER processor was the yaw damper function of an automatic landing program for a 737 aircraft. The mechanisms for interfacing the VIPER Single Board Computer to the VAX host are described. Results include run time experiences, performance evaluation, and comparison of VIPER and FORTRAN yaw damper algorithm output for accuracy estimation.
Document ID
19910022217
Acquisition Source
Legacy CDMS
Document Type
Technical Memorandum (TM)
Authors
Carreno, Victor A. (NASA Langley Research Center Hampton, VA., United States)
Angellatta, Rob K. (Lockheed Engineering and Sciences Co. Hampton, VA., United States)
Date Acquired
September 6, 2013
Publication Date
September 1, 1991
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NAS 1.15:104098
NASA-TM-104098
Accession Number
91N31531
Funding Number(s)
PROJECT: RTOP 505-64-10-05
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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