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Canonical multi-valued input Reed-Muller trees and formsThere is recently an increased interest in logic synthesis using EXOR gates. The paper introduces the fundamental concept of Orthogonal Expansion, which generalizes the ring form of the Shannon expansion to the logic with multiple-valued (mv) inputs. Based on this concept we are able to define a family of canonical tree circuits. Such circuits can be considered for binary and multiple-valued input cases. They can be multi-level (trees and DAG's) or flattened to two-level AND-EXOR circuits. Input decoders similar to those used in Sum of Products (SOP) PLA's are used in realizations of multiple-valued input functions. In the case of the binary logic the family of flattened AND-EXOR circuits includes several forms discussed by Davio and Green. For the case of the logic with multiple-valued inputs, the family of the flattened mv AND-EXOR circuits includes three expansions known from literature and two new expansions.
Document ID
19940013902
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Perkowski, M. A. (Portland State Univ. OR, United States)
Johnson, P. D. (Portland State Univ. OR, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1991
Publication Information
Publication: Idaho Univ., The 1991 3rd NASA Symposium on VLSI Design
Subject Category
Computer Programming And Software
Accession Number
94N18375
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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