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Etching of Silicon in HBr Plasmas for High Aspect Ratio FeaturesEtching in semiconductor processing typically involves using halides because of the relatively fast rates. Bromine containing plasmas can generate high aspect ratio trenches, desirable for DRAM and MEMS applications, with relatively straight sidewalk We present scanning electron microscope images for silicon-etched trenches in a HBr plasma. Using a feature profile simulation, we show that the removal yield parameter, or number of neutrals removed per incident ion due to all processes (sputtering, spontaneous desorption, etc.), dictates the profile shape. We find that the profile becomes pinched off when the removal yield is a constant, with a maximum aspect ratio (AR) of about 5 to 1 (depth to height). When the removal yield decreases with increasing ion angle, the etch rate increases at the comers and the trench bottom broadens. The profiles have ARs of over 9:1 for yields that vary with ion angle. To match the experimentally observed etched time of 250 s for an AR of 9:1 with a trench width of 0.135 microns, we find that the neutral flux must be 3.336 x 10(exp 17)sq cm/s.
Document ID
20020059586
Acquisition Source
Ames Research Center
Document Type
Preprint (Draft being sent to journal)
Authors
Hwang, Helen H.
(NASA Ames Research Center Moffett Field, CA United States)
Meyyappan, M.
(NASA Ames Research Center Moffett Field, CA United States)
Mathad, G. S.
(Infinion Technologies, Inc. United States)
Ranade, R.
(Infinion Technologies, Inc. United States)
Date Acquired
September 7, 2013
Publication Date
February 13, 2002
Subject Category
Electronics And Electrical Engineering
Funding Number(s)
PROJECT: RTOP 755-30-11
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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