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Some Improvements in Utilization of Flash Memory DevicesTwo developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.
Document ID
20090022334
Acquisition Source
Johnson Space Center
Document Type
Other - NASA Tech Brief
External Source(s)
http://www.techbriefs.com/component/content/article/5276
Authors
Gender, Thomas K. (Honeywell, Inc. Houston, TX, United States)
Chow, James (Honeywell, Inc. Houston, TX, United States)
Ott, William E. (Honeywell, Inc. Houston, TX, United States)
Date Acquired
August 24, 2013
Publication Date
June 1, 2009
Publication Information
Publication: NASA Tech Briefs, June 2009
Subject Category
Technology Utilization And Surface Transportation
Report/Patent Number
MSC-23465-1/6-1
Distribution Limits
Public
Copyright
Public Use Permitted.

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IDRelationTitle20090022325Collected WorksNASA Tech Briefs, June 2009
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