WO/2010/009873 Tunnel Nanowire Transistor

The invention provides a new type of transistor comprising a nanowire structure adapted to provide a tunnel barrier such that an applied gate voltage causes a current to oscillate, as the gate voltage is increase, to provide a region of negative transconductance. The device presents oscillations of current as the gate voltage is increased, typically when the cross section of the wire is smaller than 10nm. The sub-threshold slope of the current is larger than 60mV/decade but can locally reach values smaller than 60mV/decade in devices with small cross sections. The new transistor has applications in ultra fast switches operating at a very low voltage and in the area of memory devices in the nano-scale.