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Hybrid full-adder cell in 0.13 µm PD SOI CMOS for low-voltage low-power applications
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Document type | Communication à un colloque (Conference Paper) – Présentation orale avec comité de sélection |
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Publication date | 2005 |
Language | Anglais |
Conference | "EUROSOI 2005 - First Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits", Granada, Spain (du 19/01/2005 au 21/01/2005) |
Peer reviewed | yes |
Host document | "Proceedings of the First Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits"- p. 123-124 |
Affiliation | UCL - FSA/ELEC - Département d'électricité |
Links |
Bibliographic reference | Hassoune, Ilham ; Legat, Jean-Didier ; Flandre, Denis. Hybrid full-adder cell in 0.13 µm PD SOI CMOS for low-voltage low-power applications.EUROSOI 2005 - First Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits (Granada, Spain, du 19/01/2005 au 21/01/2005). In: Proceedings of the First Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits, 2005, p. 123-124 |
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Permanent URL | http://hdl.handle.net/2078.1/97838 |