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Contribution to a conference proceedings/Contribution to a book | FZJ-2020-00368 |
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2019
Sissa Medialab Trieste, Italy
Please use a persistent id in citations: http://hdl.handle.net/2128/23935
Abstract: Recently Arm introduced a new instruction set called Scalable Vector Extension (SVE), whichsupports vector lengths up to 2048 bits. While SVE hardware will not be generally available untilabout 2021, we believe that future SVE-based architectures will have great potential for LatticeQCD. In this contribution we discuss key aspects of SVE and describe how we implemented SVEin the Grid Lattice QCD framework.
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