Please use this identifier to cite or link to this item:
https://hdl.handle.net/2440/64510
Type: | Conference paper |
Title: | Approximate unsigned binary integer dividers for arithmetic data value speculation |
Author: | Kelly, D. Phillips, B. Al-Sarawi, S. |
Citation: | Proceedings of the 2009 Conference on Design & Architectures For Signal And Image Processing / M. Mattavelli (ed.): pp.105-112 |
Publisher: | ECSI |
Publisher Place: | online |
Issue Date: | 2009 |
Conference Name: | Conference on Design & Architectures For Signal And Image Processing (2009 : Sophia Antipolis, France) |
Editor: | Marco Mattavelli, |
Statement of Responsibility: | Daniel R. Kelly, Braden J. Phillips and Said Al-Sarawi |
Abstract: | Unsigned integer dividers capable of finding an approximate quotient are presented. The approximate quotient is most often the exact integer quotient, but can contain an error. Such approximating arithmetic can be used in a speculative execution to increase the throughput of a processor pipeline, or in probabilistic computation, where speed is more important than accuracy. In this paper a new algorithm for the approximate division of unsigned binary integers, and three divider designs based on this approximating algorithm are presented. Each divider is analysed in terms of probability of producing a correct quotient and delay. Logic synthesis is used to compare the delay, area and power of the approximating dividers. An approximating 32/32 bit divider is presented with a 99.4% probability of correctness for benchmark inputs, operating 22.5% faster than an exact radix-4 SRT divider. |
Rights: | Copyright status unknown |
Published version: | http://www.ecsi.org/sites/default/files/rs5.1.pdf |
Appears in Collections: | Aurora harvest Electrical and Electronic Engineering publications |
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