- Author
- Title
- On the realizability of hardware microthreading. Revisiting the general-purpose processor interface: consequences and challenges
- Supervisors
- Award date
- 5 September 2012
- Number of pages
- 371
- ISBN
- 9789461083203
- Document type
- PhD thesis
- Faculty
- Faculty of Science (FNWI)
- Institute
- Informatics Institute (IVI)
- Abstract
-
Multi-core chips are currently in the spotlight as a potential means to overcome the limits of frequency scaling for performance increases in processors. In this direction, the CSA group at the University of Amsterdam is investigating a new design for processors towards faster and more efficient general-purpose multi-core chips. However this design changes the interface between the hardware and software, compared to existing chips, in ways that have not been dared previously. Consequently, the concepts underlying existing operating systems and compilers must be adapted before this new design can be fully integrated and evaluated in computing systems.
This dissertation investigates the impact of the changes in the machine interface on operating software and makes four contributions. The first contribution is a comprehensive presentation of the design proposed by the CSA group. The second contribution is formed by technology that demonstrates that the chip can be programmed using standard programming tools. The third contribution is a demonstration that the hardware components can be optimized by starting to implement operating software during the hardware design instead of afterwards. The fourth contribution is an analysis of which parts of the hardware design will require further improvements before it can be fully accepted as a general-purpose platform. The first conclusion is a confirmation that the specific design considered can yield higher performance at lower cost with relatively minimal implementation effort in software. The second conclusion is that the processor interface can be redefined while designing multi-core chips as long as the design work is carried out hand in hand with operating software providers. - Note
- This work is licensed under the Creative Commons Attribution-Non-Commercial 3.0 Netherlands License. To view a copy of this
license, visit the web page at http://creativecommons.org/licenses/by-nc/3.0/nl/ or send a letter to Creative Commons, 444
Castro Street, Suite 900, Mountain View, California, 94041, USA.
Research conducted at: Universiteit van Amsterdam - Persistent Identifier
- https://hdl.handle.net/11245/1.377015
- Downloads
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Thesis
Cover
Stellingen
Title pages
Contents
List of figures
List of tables
List of side notes
Listings
Summary
Samenvatting in het Nederlands
Acknowledgements
Preface
1: Introduction
2: Trade-offs in microprocessor design
3: Architecture overview
4: Machine model & hardware interface
5: System perspective
6: Programming environment
7: Disentangling memory and synchronization
8: Visible synchronizer windows
9: Thread-local storage
10: Concurrency virtualization
11: Placement and platform partitioning
12: Issues of generality
13: Core evaluation
14: System-level issues
15: Conclusions and future work
16: Epilogue on the outer question
Appendices
Acronyms
Related publications by the author
Bibliography related to hardware microthreading
General bibliography
Index
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