Title:
A low-noise CMOS interface for capacitive microaccelerometers
A low-noise CMOS interface for capacitive microaccelerometers
Author(s)
Zhao, Dongning
Advisor(s)
Ayazi, Farrokh
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Abstract
The high-performance accelerometers with micro-gravity resolution and large dynamic range at very low frequencies are not only used in GPS-augmented inertial navigation, monitoring of aircrafts and space station, but also used in monitoring wind turbines for green energy. This dissertation presents the design and development of a mixed-signal, low-noise, and fourth-order sigma-delta interface circuit for the MEMS capacitive micro-gravity accelerometer. A fully-differential switched-capacitor (SC) amplifier architecture is developed with the low-frequency noise reduction through the integration of chopper-stabilization technique with lateral BJT at input stage. The effectiveness of different noise reduction techniques is also compared and verified. The application of fourth-order SC sigma-delta modulation concept to the inertial-grade accelerometer is to achieve the benefits of the digitization of the accelerometer output without compromising the resolution of the analog front-end. This open-loop interface provides 1-bit digital output stream and has the versatility of interfacing sensors with different sensitivities while maintaining minimum power dissipation and maximum dynamic range. The micromechanical accelerometers are fabricated in thick silicon-on-insulator (SOI) substrates. The accelerometer operates in air and is designed for non-peaking response with a bandwidth of 500 Hz.
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Date Issued
2009-11-13
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Text
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Dissertation