Graduate Thesis Or Dissertation

 

Time domain characterization of interconnect discontinuities Public Deposited

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/st74cs79j

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  • The purpose of this study is to develop experimental techniques to characterize typical interconnect discontinuities, including bends, steps, T junctions, vias and pads, which are the most commonly encountered interconnections in high speed digital integrated circuits, hybrid and monolithic microwave circuits and electronic packages. The time domain reflection response of these elements is used to classify the interconnect discontinuities as distributed discontinuity elements or as lumped elements depending upon the reflected waveform. For the cases of general distributed discontinuities including bends, steps and T junctions, the distributed equivalent circuit model is characterized by the time dependent impedance profile which is extracted from the time domain reflection measurements. By using known inverse scattering techniques implemented in terms of a new algorithm based on the transfer scattering matrix method of incremental uniform sections, this nonuniform impedance profile is extracted and is used to construct distributed element circuit models to represent the interconnect discontinuities. A circuit model consisting of lumped/distributed elements, is also developed for the interconnect discontinuities which is intended to combine the accuracy of the distributed model with the simulation efficiency of the lumped models. This hybrid mode reduces computer simulation time when used as a net list for general purpose circuit simulators, such as SPICE. For the case of discontinuities modelled as lumped elements, such as vias and wiring pads, closed form equations based on the transfer scattering matrix solution are derived and used to extract the lumped electrical parameters of these elements from the time domain reflection waveform. All of these lumped, distributed and hybrid models are validated by comparing the time domain simulation results with Time Domain Reflectrometer ( TDR ) measurements. A procedure for extracting the excess inductances and capacitances associated with the general discontinuities from the synthesized nonuniform impedance profile or the distributed model is also presented in this report. These results for excess lumped inductances and capacitances show close agreement with the published results for these structures which are based on the electromagnetic computation of excess currents and charges and frequency domain measurements. Finally, some typical cases demonstrating the effects of interconnect discontinuities in high speed clocking systems are presented and the procedure for reducing the reflections and transmission noise voltage by chamfering the bends and junctions is described.
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