Graduate Thesis Or Dissertation
 

Analysis and Design of Low Voltage LC Oscillators and their Application to Wireless Sensor Networks

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/td96k7187

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  • This dissertation focuses on the analysis, design, and application of inductor-capacitor (LC) oscillators for wireless sensor networks (WSNs). First an analysis and design optimization approach for enhanced swing, low power CMOS LC oscillators is presented. A phasor based analysis is used for determining the amplitude and phase noise of these oscillators with MOSFET operation in cut-off, linear and saturation regions. The calculated steady state output amplitude and phase noise from this analysis are in agreement with Cadence Spectre simulations for different bias conditions. An application of this analysis to the design optimization of LC oscillators is also demonstrated. This is followed by a power generation method based fast start-up analysis of resonator based oscillators. A small signal two-port based approach that is design oriented is presented. The analysis has been validated with detailed circuit level simulations. Several MOSFET oscillator architectures have been analyzed and the start-up times compared using this analysis with applications to start-up time reduction of LC oscillators. A novel low voltage quadrature LC oscillator with a fast start-up is then presented. Simulations show that the proposed oscillator can obtain a phase noise of -150 dBc/Hz at 10 MHz offset for a 5 GHz center frequency and an FoM of 195 dBc/Hz. The proposed oscillator has a superior start-up performance compared to other low voltage quadrature LC oscillator architectures. The design aspect of LC oscillators focuses on a new enhanced swing class-D VCO which operates from a supply voltage as low as 300 mV. The architectural advantages are described along with an analysis for the oscillation frequency. Prototype differential and quadrature variants of the proposed VCO have been implemented in a 65 nm RF CMOS process with a 5 GHz oscillation frequency. At a 350 mV supply, the measured phase noise performance for the quadrature VCO with a 5% tuning range is -137.1 dBc/Hz at 3 MHz offset with a power dissipation of 2.1 mW from a 0.35 V supply. The highest resulting figure-of-merit (FoM) is 198.3 dBc/Hz. Finally, an application of LC oscillators for a crystal free radio-frequency (RF) receiver design has been explored. It is shown that a source-synchronous receiver with MSK modulation is a suitable choice for eliminating the crystal in WSN applications. Design trade-offs have been analyzed using system level simulations.
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