An integer-N charge-pump phase-locked loop with controllable phase offset
Yim, Chris
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https://hdl.handle.net/2142/106254
Description
Title
An integer-N charge-pump phase-locked loop with controllable phase offset
Author(s)
Yim, Chris
Issue Date
2019-12-09
Director of Research (if dissertation) or Advisor (if thesis)
Hanumolu, Pavan K.
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
PLL
CPLL
charge-pump
phase offset
Abstract
In a phase-locked loop (PLL), the phase-offset is a result from non-idealities that usually need to be minimized to reduce the reference spurs at the output. However, in certain applications such as multi-buses, we would like to control this offset so we can align the clock with the data. This thesis will explore the idea of controlling the phase-offset at the output of a charge-pump PLL (CPLL) by setting the current mismatch in the charge-pump module.
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