Architecture and CAD for carbon nanomaterial integrated circuits

Chilstedt, Scott E.

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https://hdl.handle.net/2142/15969 Copy

Description

Title

Architecture and CAD for carbon nanomaterial integrated circuits

Author(s)

Chilstedt, Scott E.

Issue Date

2010-05-18T18:52:59Z

Director of Research (if dissertation) or Advisor (if thesis)

Chen, Deming

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

M.S.

Degree Level

Thesis

Keyword(s)

• Carbon Nanotubes
• Graphene Nanoribbons
• Carbon Nanomaterial Transistors
• Nanoelectronic Architectures
• Field programmable carbon nanotube array (FPCNA)
• Variation-Aware CAD
• Discretized statistical static timing analysis (SSTA)

Abstract

The ITRS (International Technology Roadmap for Semiconductors) has recommended that carbon-based transistors be given further study as a potential “Beyond CMOS” technology. Unlike traditional devices with a silicon channel, these transistors have channels made from semiconducting carbon nanomaterials in the form of carbon nanotubes (CNTs) and graphene nanoribbons (GNRs). The research community has given specific attention to these two carbon allotropes because of their outstanding electrical properties, including high mobilities at room temperature, high current densities, and micron-scale mean free paths. Carbon nanomaterial transistors offer many opportunities for circuits and systems, but also present a number of challenges in terms of fabrication, architecture design, and CAD integration. In order to be useful to the semiconductor industry, transistors must be connected together to form higher order circuits. Due to the increased variation and defects in nanometer-scale fabrication, and the regular nature of bottom-up self-assembly, field programmable devices are a promising initial application for such technologies. This thesis details the design and evaluation of a carbon nanomaterial based architecture called FPCNA (field programmable carbon nanotube array). Nanomaterial based devices and circuit building blocks are developed and characterized, including a lookup table created entirely from continuous CNT arrays. To determine the performance of these building blocks, variation-aware physical design tools are used, with statistical timing analysis that can handle both Gaussian and non-Gaussian random variables. When the FPCNA architecture is evaluated using this CAD flow, a 2.75× performance improvement is seen over an equivalent CMOS FPGA at a 95% yield. In addition, FPCNA offers a 5.07× footprint reduction compared to the baseline FPGA.

Graduation Semester

2010-5

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http://hdl.handle.net/2142/15969

Copyright and License Information

Copyright 2010 Scott E. Chilstedt

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