High speed implementation of signal space detectors

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In this paper, we generalize the concept of signal space detection to construct a fixed delay tree search (FDTS) detector which estimates a block of n channel symbols gt a time. This technique is useful for high speed implementation. Two approaches are discussed both of which are based on signal space partitioning. In the first approach, symbol detection is performed based on a multi-class partitioning of the signal space. This approach is a generalization of binary symbol detection based on two-class pattern classification. In the second approach, binary signal detection is combined with a look-ahead technique, resulting in a highly parallel detector architecture.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
1998-07
Language
English
Article Type
Article; Proceedings Paper
Citation

IEEE TRANSACTIONS ON MAGNETICS, v.34, no.4, pp.1925 - 1927

ISSN
0018-9464
DOI
10.1109/20.706745
URI
http://hdl.handle.net/10203/75649
Appears in Collection
EE-Journal Papers(저널논문)
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