Publication: Design of a reconfigurable pseudorandom number generator for use in intelligent systems
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Date
2011-05-01
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Graduate program
Undergraduate course
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Volume Title
Publisher
Elsevier B.V.
Type
Article
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Acesso restrito
Abstract
This paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the following five linear generator algorithms: a multiplicative congruential, a mixed congruential, a standard multiple recursive, a mixed multiple recursive, and a multiply-with-carry. The generation unit can be used both as a pseudorandom and a message passing-based server, which is able to produce pseudorandom numbers on demand, sending them to the network-on-chip blocks that originate the service request. The generator architecture has been mapped to a field programmable gate array, and showed that millions of numbers in 32-, 64-, 96-, or 128-bit formats can be produced in tens of milliseconds. (C) 2011 Elsevier B.V. All rights reserved.
Description
Language
English
Citation
Neurocomputing. Amsterdam: Elsevier B.V., v. 74, n. 10, p. 1510-1519, 2011.
