Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language
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2008-12-01
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In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.
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Active power-factor correction, hysteresis modulation, Digital control, Fpga device, Hybrid rectifier, AC generator motors, Computer hardware description languages, Digital control systems, Elasticity, Electric power factor, Electric power factor correction, Electronic equipment, Field programmable gate arrays (FPGA), Hysteresis, Linguistics, Modulation, Power electronics, Rectifying circuits, Control techniques, Diode rectifiers, Fpga devices, Hpf rectifiers, Input currents, Input power factors, International standards, Output powers, Power ratings, Reduced inputs, Switching modes, Total Harmonic distortions, VHDL languages, Electric rectifiers
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7th Internatonal Conference on Power Electronics, ICPE'07, p. 420-425.