A Processor Extension for Time-Predictable Code Execution

Platzer, Michael; Puschner, Peter

doi:10.1109/isorc52013.2021.00016

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Record link:

http://hdl.handle.net/20.500.12708/58468

Title:

A Processor Extension for Time-Predictable Code Execution

Citation:

Platzer, M., & Puschner, P. (2021). A Processor Extension for Time-Predictable Code Execution. In C. Ceballos (Ed.), 2021 IEEE 24th International Symposium on Real-Time Distributed Computing (ISORC). IEEE. https://doi.org/10.1109/isorc52013.2021.00016

Publisher DOI:

10.1109/isorc52013.2021.00016

Publication Type:

Inproceedings - Full-Paper Contribution

Authors:

Platzer, Michael
Puschner, Peter

Organisational Unit:

E191-01 - Forschungsbereich Cyber-Physical Systems

Published in:

2021 IEEE 24th International Symposium on Real-Time Distributed Computing (ISORC)

Date (published):

2021

Event name:

2021 IEEE 24th International Symposium on Real-Time Distributed Computing (ISORC)

Event date:

1-Jun-2021 - 3-Jun-2021

Event place:

Daegu, Korea (the Republic of)

Number of Pages:

Publisher:

IEEE, IEEE

Peer reviewed:

Yes

Keywords:

real-time systems; single-path code; predictable timing

Abstract:

In this paper, we present an instruction filter, a simple architecture extension that adds support for fully predicated execution to existing processor cores that do not natively support it. This makes single-path code execution and hence high quality and easily derivable worst-case execution time (WCET) information available for a wide range of processors. We have implemented the single-path inst...

Research Areas:

Computer Engineering and Software-Intensive Systems: 100%

Science Branch:

Informatik

Appears in Collections:

Conference Paper

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