A Novel High-Performance CMOS VCRO Based on Electrically Doped Nanowire FETs in 10 nm Node

In this paper, the idea of electrically doped (ED) Nano-scale TFETs is used to design a non-tunneling n-type NWFET with an additional gate named the side-gate (SG). The work function of SG and the efects of its voltage on the performance of the ED-NWFET device are analyzed. A conventional p-type NWFET and the proposed n-type ED-NWFET are used to design a CMOS inverter, which exhibits considerable dependency on the voltage of the side-gate. Three stages of this inverter are used to design a CMOS voltage-controlled ring oscillator (VCRO), which has a high frequency range of 89.2 to 465 GHz for the side-gate voltage range of 0 to 1 V. Consequently, it has a high frequency tuning range of approximately 136%. The tuning range, phase noise, fgure of merit (FoM) and the fgure of merit with tuning range (FoMT) of the proposed VCRO are superior in comparison with other reported VCROs. The proposed VCRO also has excellent linear frequency-voltage characteristics in the side-gate voltage range of 0.2 to 0.5 V. This linear VCRO exhibits superior performance, including a wide frequency range, compared to other linear VCROs. The results presented in this paper have demonstrated the efcacy of the proposed Nano-scale device engineering-based circuit design technique for applications over a wide frequency range.